SQ96B82L is the audio coding/decoding SoC IC integrated with USB/SD interfaces, featuring low cost, low power dissipation, high performance and high integration. It adopts dual-core structure formed by low power dissipation MCU and high performance RISC for secondary development.
Wireless Music playing and voice calls are available if additionally Bluetooth protocol and voice process module are embedded.
Dual-core structure formed by low power dissipation 8-bit MCU and high performance 32-bit RISC
Performance of MCU core is 4 times better than traditional 51, the instruction set is compatible with traditional MCS-51 instruction set.
CACHE+SPI structure for high SPI flash access efficiency;
SPI flash read/write controlled by MCU when Cache is locked;
Internal RAM of MCU is 256 bytes, external RAM is 2K+512 bytes, the instruction space can be expanded up to 8M byte through SPI flash.
High-performance 32-bit RISC core, 6-level pipelines.
Harvard cache architecture with separate 8KB Instruction and Data Cache, single-cycle multiplication/accumulation operations, on-chip debugging (OCD) supported.
2-bit instruction and data space, with MMU function, operating system supported.
Clock & Power Manager
External 32.768KHz and 12MHz oscillators;
Built-in MCU PLL with 32.768KHz reference clock and System PLL12MHz reference clock, Audio PLL and USB PLL;
Clock frequency division control, MCU is able to work at 9-level frequencies in range of 32.768KHz ~ 24MHz, while RISC at 15-level frequencies in the range of 30MHz ~ 162MHz.
Single 3.3V power supply, built-in DC-DC and LDO modules, provided to RISC and MCU cores.
RTC separately powered, with calendar function, 256-byte RAM which can save information during power outage of the main circuit.
Multi low-power operating modes supported, such as stop mode.
SPI flash controller.
SPI flash 1/2-wire modes.
Firmware in SPI flash update available, SPI flash start available.
MCU program is able to be run in SPI flash, debugging code downloadable.
High-efficiency SDRAM Interface, 16-bit data operating supported;
Supporting SDRAM low-power modes, such as self-refresh, power down, etc.
Packaged with SDRAM die of 1M*16-bit;
On-chip USB full/low speed controller, host/device mode available:
5 endpoints, three of which are INOUT type.
Integrated DMA, supports real-time transfer, interrupt transfer, bulk transfer, and controlled transfer.
Support USB wakeup and suspend.
Support USB audio application.
Integrated SD/MMC/SDIO three-in-one controllers, supporting SD/MMC/SDIO protocol and general SPI interface.
Integrated high-speed UART controller.
Up to 4Mbps baud rate, with 64-byte buffer, DMA controlled data stream transmission.
Communicating with Bluetooth baseband processing module.
Integrated I2S control modules.
Support sampling rate up to 24-bit@192KHz.
DMA-controlled data stream transmission.
Integrated SPDIF output, sampling rate up to 24-bit@96KHz, DMA controlled data stream transmission.
Integrated one-channel 18-bit DAC, analog output LINEOUT_R and LINEOUT_L.
Integrated I2C host/slave control interfaces;
Integrated 4-channel PWM outputs;
Integrated 16-bit audio ADC.
2 channels, used for MIC input, supporting audio superposition and simple reverberation processing;
Supporting saving the coded recorded data to SD or U disk;
Integrated 6-channel 10-bit ADC, keys and MCU wake-up function available.
Integrated programmable GPIO, four-grade drive current configurable (2mA/4mA/8mA/24mA), pull-up or open-drain configurable.
Support ADPCM, MP3*, WMA*, LC-AAC*, OGG, FLAC*, APE* decode.
Support ADPCM and MP3* encode.
Able to embedded EQ software.
Embedded the bluetooth protocol stack, supports profile such as A2DP, HFP, AVRCP, and PBAP.
Built-in noise suppression and echo cancellation algorithm to realize the Bluetooth voice communication function