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    The SLP74AHC541 are octal buffer/line driver with 3-state outputs.

    The 3-state control gate is a two-input AND gate with active-low inputs so that if either output-enable (OE(———0 or OE(———1) input is high, all corresponding outputs are in the high-impedance state. The outputs provide noninverted data when they are not in the high-impedance state.


Main feature
  • Inputs accept voltages higher than VCC

  • Balanced propagation delays

  • CMOS input levels

  • ESD protection:

  • HBM Exceeds 2000V

  • CDM Exceeds1000V

  • Latch-up performance exceeds 100mA

  • Specified from -40°C to +85°C and from -40°C to +125°C


Block Diagram

SLP74AHC541  (2880-1440).png

Documents
title Types of Size (KB) date Download the latest English version
SLP74AHC541 0 1970-01-01 SLP74AHC541 Brief Datasheet