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       The SLP74AUP1G32 is a single 2-input OR gate. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Main feature
  • Wide supply voltage range from 0.8 V to 3.6 V 

  • CMOS low power dissipation 

  • High noise immunity 

  • Overvoltage tolerant inputs to 3.6 V 

  • Low noise overshoot and undershoot < 10 % of VCC 

  • IOFF circuitry provides partial power-down mode operation 

  • Latch-up performance : 100mA

  • Low static power consumption; ICC = 0.9 µA (maximum) 

  • ESD protection: 

  • HBM : 2000V 

  • CDM : 1000V 

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C


Ordering Information
Product Name Package form Marking Hazardous Substance Control Packing Type Remarks
SLP74AUP1G32KBTR SOT-23-5L AG32 Halogen free Tape&Reel
SLP74AUP1G32KMTR SOT-353-5L S1 Halogen free Tape&Reel
SLP74AUP1G32ABTR DFN-6-1x1x0.37-0.35 2 Halogen free Tape&Reel
Block Diagram

SLP74AUP1G32.png

Documents
title Types of Size (KB) date Download the latest English version
SLP74AUP1G32 0 2026-07-02 SLP74AUP1G32 Brief Datasheet